A 5 V to 180 V Charge Pump for Capacitive Loads in a 180 nm SOI Process

This paper presents two variants of a high step-up ratio charge pump for voltage micro electro-mechanical system and condenser microphones. The implementations are based on an additive topology where respectively 46 57 cascaded stages used to generate output 182 V from supply 5 V. pumps have been fabricated in 180 nm SOI process with breakdown more than 200 occupy area 0.52 mm2 0.39 mm2. can up 182.5 181.7 designed drive capacitive load leakage 2 nA. When driven 100 kHz clock, their power consumption is 40 µW 20 µW. rise time the 0 less ms. implemented exhibit state-of-the-art performance very dc-dc applications.